Digital system design with FPGA : (Record no. 386)
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| 000 -LEADER | |
|---|---|
| fixed length control field | 01035cam a22002897i 4500 |
| 001 - CONTROL NUMBER | |
| control field | 20097045 |
| 003 - CONTROL NUMBER IDENTIFIER | |
| control field | OSt |
| 005 - DATE AND TIME OF LATEST TRANSACTION | |
| control field | 20200206085312.0 |
| 008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION | |
| fixed length control field | 171026t20172017nyua b 001 0 eng c |
| 010 ## - LIBRARY OF CONGRESS CONTROL NUMBER | |
| LC control number | 2017446855 |
| 020 ## - INTERNATIONAL STANDARD BOOK NUMBER | |
| International Standard Book Number | 1259837904 |
| International Standard Book Number | 9781259837906 |
| 035 ## - SYSTEM CONTROL NUMBER | |
| System control number | (OCoLC)ocn959648624 |
| 040 ## - CATALOGING SOURCE | |
| Transcribing agency | KCST |
| 050 00 - LIBRARY OF CONGRESS CALL NUMBER | |
| Classification number | TK7895.G36 |
| Item number | U57 2017 |
| 082 00 - DEWEY DECIMAL CLASSIFICATION NUMBER | |
| Classification number | 621.392 |
| Edition number | 23 |
| Item number | Un Di |
| 100 1# - MAIN ENTRY--PERSONAL NAME | |
| Personal name | Ünsalan, Cem, |
| Relator term | author. |
| 9 (RLIN) | 1305 |
| 245 10 - TITLE STATEMENT | |
| Title | Digital system design with FPGA : |
| Remainder of title | implementation using Verilog and VHDL / |
| Statement of responsibility, etc. | Cem Ünsaln, Yeditepe University, Bora Tar, The Ohio State University. |
| 260 ## - PUBLICATION, DISTRIBUTION, ETC. | |
| Place of publication, distribution, etc. | New York, NY : |
| Name of publisher, distributor, etc. | McGraw-Hill Education, |
| Date of publication, distribution, etc. | 2017. |
| 300 ## - PHYSICAL DESCRIPTION | |
| Extent | xv, 384 pages : |
| Other physical details | illustrations ; |
| Dimensions | 25 cm |
| 504 ## - BIBLIOGRAPHY, ETC. NOTE | |
| Bibliography, etc. note | Includes bibliographical references and index. |
| 650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM | |
| Topical term or geographic name entry element | Field programmable gate arrays. |
| 9 (RLIN) | 1306 |
| Topical term or geographic name entry element | Verilog (Computer hardware description language) |
| 9 (RLIN) | 1307 |
| Topical term or geographic name entry element | VHDL (Computer hardware description language) |
| 9 (RLIN) | 1308 |
| 700 1# - ADDED ENTRY--PERSONAL NAME | |
| Personal name | Tar, Bora, |
| Relator term | author. |
| 9 (RLIN) | 1309 |
| 942 ## - ADDED ENTRY ELEMENTS (KOHA) | |
| Source of classification or shelving scheme | |
| Koha item type | Book |
| Withdrawn status | Lost status | Source of classification or shelving scheme | Damaged status | Not for loan | Permanent Location | Current Location | Date acquired | Full call number | Barcode | Date last seen | Price effective from | Koha item type |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| KCST Library | KCST Library | 2020-02-06 | 621.392 Un Di | 1000000648 | 2020-02-11 | 2020-02-06 | Book |