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Multi-GHz frequency synthesis & division frequency synthesizer design for 5 GHz wireless LAN systems / Hamid R Rategh; Thomas H Lee

By: Contributor(s): Material type: TextTextPublication details: Boston: Springer, 2001.Description: xviii, 148 pages : illustrations ; 25 cmISBN:
  • 9781475775006
Subject(s): DDC classification:
  • 621.3815 Ra Mu
Contents:
1.1 Organization 2 -- 2. Wireless Local Area Networks 5 -- 2.1 Wireless LAN standards 6 -- 2.2 Wireless LAN transceivers 9 -- 3. Frequency Synthesizers 13 -- 3.1 Phase-locked loops 13 -- 3.2 Linearized PLL models 18 -- 3.2.1 First order PLL 19 -- 3.2.2 Second order PLL 20 -- 3.2.3 Third order PLL 23 -- 3.2.4 Fourth order PLL 30 -- 3.3 Noise in phase-locked loops 37 -- 4. Frequency Dividers 41 -- 4.1 Digital frequency dividers 41 -- 4.2 Analog frequency dividers 48 -- 4.3 Injection-locked frequency dividers 51 -- 4.3.1 Model for injection-locked frequency dividers 52 -- 4.3.1.1 Divide-by-two ILFDs with third and fourth order nonlinear functions 55 -- 4.3.2 Tracking injection-locked frequency dividers 58 -- 4.3.3 Noise in injection-locked frequency dividers 58 -- 5. Experimental Injection-Locked Frequency Dividers 65 -- 5.1 Circuit topologies 65 -- 5.2 Measurement Results 69 -- 5.2.1 Single-ended ILFD 69 -- 5.2.2 Differential tracking ILFD 73 -- 5.2.3 Noise transfer function 79 -- 6. An Experimental 5GHZ Frequency Synthesizer 83 -- 6.1 Proposed synthesizer architecture 85 -- 6.2 Synthesizer building blocks 86 -- 6.2.1 Voltage-controlled oscillator 86 -- 6.2.2 Injection-locked frequency divider 90 -- 6.2.3 Programmable frequency divider ([divide]M) 91 -- 6.2.4 Phase/frequency detector 95 -- 6.2.5 Charge pump and Loop filter 97 -- 6.3 Measurement Results 99 -- 7.1 Future work 110 -- 2D Fourier series expansion of an ILFD nonlinear function 113 -- Input-output phase difference in an ILFD 115 -- Polynomial approximation of an oscillator nonlinearity 119 -- On-chip spiral inductors 123.
Item type: Book
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1.1 Organization 2 --
2. Wireless Local Area Networks 5 --
2.1 Wireless LAN standards 6 --
2.2 Wireless LAN transceivers 9 --
3. Frequency Synthesizers 13 --
3.1 Phase-locked loops 13 --
3.2 Linearized PLL models 18 --
3.2.1 First order PLL 19 --
3.2.2 Second order PLL 20 --
3.2.3 Third order PLL 23 --
3.2.4 Fourth order PLL 30 --
3.3 Noise in phase-locked loops 37 --
4. Frequency Dividers 41 --
4.1 Digital frequency dividers 41 --
4.2 Analog frequency dividers 48 --
4.3 Injection-locked frequency dividers 51 --
4.3.1 Model for injection-locked frequency dividers 52 --
4.3.1.1 Divide-by-two ILFDs with third and fourth order nonlinear functions 55 --
4.3.2 Tracking injection-locked frequency dividers 58 --
4.3.3 Noise in injection-locked frequency dividers 58 --
5. Experimental Injection-Locked Frequency Dividers 65 --
5.1 Circuit topologies 65 --
5.2 Measurement Results 69 --
5.2.1 Single-ended ILFD 69 --
5.2.2 Differential tracking ILFD 73 --
5.2.3 Noise transfer function 79 --
6. An Experimental 5GHZ Frequency Synthesizer 83 --
6.1 Proposed synthesizer architecture 85 --
6.2 Synthesizer building blocks 86 --
6.2.1 Voltage-controlled oscillator 86 --
6.2.2 Injection-locked frequency divider 90 --
6.2.3 Programmable frequency divider ([divide]M) 91 --
6.2.4 Phase/frequency detector 95 --
6.2.5 Charge pump and Loop filter 97 --
6.3 Measurement Results 99 --
7.1 Future work 110 --
2D Fourier series expansion of an ILFD nonlinear function 113 --
Input-output phase difference in an ILFD 115 --
Polynomial approximation of an oscillator nonlinearity 119 --
On-chip spiral inductors 123.

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