Embedded multimedia security systems : algorithms and architectures / Amit Pande, Joseph Zambreno.

Includes bibliographical references and index.

Machine generated contents note: pt. I Multimedia Systems -- 1.Introduction -- 1.1.Video Coding -- 1.2.Embedded Systems and Reconfigurable Architectures -- 1.3.Encryption Basics -- 2.Advances in Multimedia Encryption -- 2.1.Introduction -- 2.2.Multimedia Encryption Problem -- 2.3.Common Approaches to Video Encryption -- 2.3.1.Scrambling -- 2.3.2.Post-compression Encryption Algorithm -- 2.3.3.Pre-compression Encryption Algorithm -- 2.3.4.Selective Encryption -- 2.3.5.Joint Video Compression and Encryption (JVCE) Approaches -- 2.3.6.Future of JVCE Schemes -- References -- 3.Securing Multimedia Content Using Joint Compression and Encryption -- 3.1.Introduction -- 3.2.Basics -- 3.3.Our Approach -- References -- pt. II Examples -- 4.Polymorphic Wavelet Transform -- 4.1.Introduction -- 4.2.Motivation and Insight -- 4.2.1.Daubechies 9/7-Tap Bi-orthogonal Filter -- 4.2.2.Le Gall's 5/3 Filter -- 4.3.Background and Related Work -- 4.3.1.Wavelet Transform Background --

Contents note continued: 4.3.2.Hardware Implementation of DWT -- 4.4.Poly-DWT Filter -- 4.4.1.Parameterized Filter Design -- 4.4.2.Numerical Study -- 4.4.3.Candidate Filters -- 4.4.4.Hardware Architectures -- 4.5.Fixed Point Implementation -- 4.6.Hardware (Re)-allocation -- 4.6.1.'On-the-Fly' Switching -- 4.6.2.'Bit-Width' Switching -- 4.7.Experiments -- 4.7.1.Image Reconstruction Quality -- 4.7.2.Hardware vs. Software Performance -- 4.7.3.Hardware Comparison -- 4.7.4.Dynamic Bit Allocation -- 4.7.5.Real-World Application -- 4.8.Conclusions and Future Work -- References -- 5.The Secure Wavelet Transform -- 5.1.Introduction -- 5.2.Preliminaries -- 5.2.1.Parameterized Construction of DWT -- 5.2.2.Subband Re-orientation -- 5.3.Security -- 5.4.Hardware Implementation -- 5.4.1.Reconfigurable Constant Multiplier (RCM) -- 5.4.2.Implementation Results -- 5.5.Parameterized Lifting -- 5.6.Conclusion and Future Work -- References -- 6.Chaotic Filter Banks -- 6.1.Introduction --

Contents note continued: 6.1.1.Chaos and Cryptography -- 6.1.2.Wavelets and Chaotic Filter Banks -- 6.1.3.Scope and Organization -- 6.1.4.Reconfigurable Hardware Implementation of DWT -- 6.2.Chaotic Filter Bank Scheme -- 6.2.1.Chaotic Maps -- 6.2.2.Key Space -- 6.3.The MCFB Scheme -- 6.4.Improved Chaotic Oscillator -- 6.4.1.The Modified Logistic Map (MLM) -- 6.5.Wavelet Parameterization -- 6.6.Resistance of Chaotic Generator Against Cryptanalysis -- 6.6.1.Randomness Tests -- 6.6.2.Bifurcation Map -- 6.6.3.Lyapunov Exponent -- 6.7.Security Enhancement -- 6.8.Hardware Implementation -- 6.8.1.Hardware Optimizations for ICO -- 6.9.Conclusions -- References -- 7.Chaotic Arithmetic Coding -- 7.1.Introduction -- 7.1.1.Weakness of SAC Coder -- 7.2.Arithmetic Coding with Piece-wise Linear Chaotic Maps -- 7.2.1.Compression Efficiency -- 7.2.2.Binary Chaotic Arithmetic Coding (BCAC) -- 7.2.3.Implementation Efficiency -- 7.3.Security -- 7.3.1.Application to Multimedia/Data Encryption --

Contents note continued: 7.3.2.Threat Model -- 7.3.3.Security Enhancements (SE) -- 7.3.4.Resistance to Known Attacks -- 7.3.5.Comparison with BAC+AES -- 7.3.6.Key and Plaintext Sensitivity -- 7.3.7.Selective Encryption Using BCAC -- 7.4.Compression -- 7.5.Hardware Implementation -- 7.5.1.Literature Review -- 7.5.2.Implementation Details -- 7.5.3.Binary Arithmetic Coder (BAC) Architecture -- 7.5.4.Binary Chaotic Arithmetic Coder and Encryption (BCAC) Architecture -- 7.5.5.Cost of Encryption -- 7.5.6.N-ary Chaotic Arithmetic Coder and Encryption (NCAC) Coding -- 7.5.7.Multiple Symbol per Cycle Arithmetic Coding -- 7.6.Related Work -- 7.6.1.Multiple Huffman Tables -- 7.6.2.Randomized Arithmetic Coding -- 7.6.3.Secure Arithmetic Coding -- 7.7.Conclusion -- References -- 8.Conclusion.