000			00689nam a22002297a 4500
003			OSt
005			20250417104503.0
008			220322b ||||| |||| 00| 0 eng d
020			_a9781292231167
040			_cKCST
082			_a621.395 _bMo Di
100			_aMano, Moshe Morris _95687
245			_a Digital design : _bwith a introduction to the Verilog HDL, VHDL, and SystemVerilog / _cMoshe Morris Mano; Michael D Ciletti
250			_a6th _bGlobal edition.
260			_aHarlow, UK : _bPearson; _c[2019] © 2019.
300			_a710 p.
650			_aVHDL _95688
650			_aVERILOG _95689
650			_aCircuit design _95690
700			_aCiletti, Michael D _95691
942			_2ddc _cBK
999			_c811 _d811